# NOTE: This test verifies disable/enable instruction hoisting to hot blocks
#       based on non-profile data
# RUN: llc -run-pass early-machinelicm -mtriple=powerpc64le-unknown-linux-gnu \
# RUN:   -verify-machineinstrs -disable-hoisting-to-hotter-blocks=all \
# RUN:   -block-freq-ratio-threshold=100 %s -o - | FileCheck %s \
# RUN:   --check-prefix=CHECK-NO-HOIST
# RUN: llc -run-pass early-machinelicm -mtriple=powerpc64le-unknown-linux-gnu \
# RUN:   -verify-machineinstrs -disable-hoisting-to-hotter-blocks=all \
# RUN:   -block-freq-ratio-threshold=100000000 %s -o - | FileCheck %s \
# RUN:   --check-prefix=CHECK-HOIST
# RUN: llc -run-pass early-machinelicm -mtriple=powerpc64le-unknown-linux-gnu \
# RUN:   -verify-machineinstrs -disable-hoisting-to-hotter-blocks=pgo \
# RUN:   -block-freq-ratio-threshold=100 %s -o - | FileCheck %s \
# RUN:   --check-prefix=CHECK-HOIST
# RUN: llc -run-pass early-machinelicm -mtriple=powerpc64le-unknown-linux-gnu \
# RUN:   -verify-machineinstrs -disable-hoisting-to-hotter-blocks=none \
# RUN:   -block-freq-ratio-threshold=100 %s -o - | FileCheck %s \
# RUN:   --check-prefix=CHECK-HOIST

--- |
  target datalayout = "e-m:e-i64:64-n32:64"

  define dso_local void @test(ptr nocapture %fp, i32 signext %Arg, i32 signext %Len, ptr nocapture %Ptr) {
  entry:
    tail call void asm sideeffect "#NOTHING", "~{r2}"()
    %cmp6 = icmp sgt i32 %Len, 0
    br i1 %cmp6, label %for.body.lr.ph, label %for.cond.cleanup

  for.body.lr.ph:                                   ; preds = %entry
    %cmp1 = icmp sgt i32 %Arg, 10
    br label %for.body

  for.cond.cleanup:                                 ; preds = %for.inc, %entry
    ret void

  for.body:                                         ; preds = %for.inc, %for.body.lr.ph
    %i.07 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.inc ]
    %0 = load i32, ptr %Ptr, align 4
    %1 = add i32 %i.07, %0
    store i32 %1, ptr %Ptr, align 4
    br i1 %cmp1, label %if.then, label %for.inc

  if.then:                                          ; preds = %for.body
    tail call void asm sideeffect "#NOTHING", "~{r2}"()
    tail call void %fp(i32 signext %Arg)
    br label %for.inc

  for.inc:                                          ; preds = %if.then, %for.body
    %inc = add nuw nsw i32 %i.07, 1
    %exitcond = icmp eq i32 %Len, %inc
    br i1 %exitcond, label %for.cond.cleanup, label %for.body
  }

  ; Function Attrs: nounwind
  declare void @llvm.stackprotector(ptr, ptr) #0

  attributes #0 = { nounwind }

...
---
name:            test
alignment:       4
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:
  - { id: 0, class: crbitrc, preferred-register: '' }
  - { id: 1, class: gprc_and_gprc_nor0, preferred-register: '' }
  - { id: 2, class: gprc, preferred-register: '' }
  - { id: 3, class: g8rc, preferred-register: '' }
  - { id: 4, class: g8rc, preferred-register: '' }
  - { id: 5, class: g8rc, preferred-register: '' }
  - { id: 6, class: g8rc_and_g8rc_nox0, preferred-register: '' }
  - { id: 7, class: gprc, preferred-register: '' }
  - { id: 8, class: gprc, preferred-register: '' }
  - { id: 9, class: crrc, preferred-register: '' }
  - { id: 10, class: gprc, preferred-register: '' }
  - { id: 11, class: crrc, preferred-register: '' }
  - { id: 12, class: gprc, preferred-register: '' }
  - { id: 13, class: gprc, preferred-register: '' }
  - { id: 14, class: g8rc, preferred-register: '' }
  - { id: 15, class: g8rc, preferred-register: '' }
  - { id: 16, class: crrc, preferred-register: '' }
liveins:
  - { reg: '$x3', virtual-reg: '%3' }
  - { reg: '$x4', virtual-reg: '%4' }
  - { reg: '$x5', virtual-reg: '%5' }
  - { reg: '$x6', virtual-reg: '%6' }
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    0
  adjustsStack:    false
  hasCalls:        true
  stackProtector:  ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:           []
constants:       []
machineFunctionInfo: {}
body:             |
  bb.0.entry:
    successors: %bb.1(0x7ecade30), %bb.2(0x013521d0)
    liveins: $x3, $x4, $x5, $x6

    %6:g8rc_and_g8rc_nox0 = COPY $x6
    %5:g8rc = COPY $x5
    %4:g8rc = COPY $x4
    %3:g8rc = COPY $x3
    %7:gprc = COPY %4.sub_32
    %8:gprc = COPY %5.sub_32
    INLINEASM &"#NOTHING", 1, 12, implicit-def early-clobber $r2
    %9:crrc = CMPWI %8, 1
    BCC 12, killed %9, %bb.2
    B %bb.1

  bb.1.for.body.lr.ph:
    successors: %bb.3(0x80000000)

    INLINEASM &"#NOTHING", 1, 12, implicit-def early-clobber $r2
    %11:crrc = CMPWI %7, 10
    %0:crbitrc = COPY %11.sub_gt
    %10:gprc = LI 0
    B %bb.3

  bb.2.for.cond.cleanup:
    BLR8 implicit $lr8, implicit $rm

  bb.3.for.body:
    successors: %bb.4(0x00000002), %bb.5(0x7ffffffe)

    %1:gprc_and_gprc_nor0 = PHI %10, %bb.1, %2, %bb.5
    %12:gprc = LWZ 0, %6 :: (load (s32) from %ir.Ptr)
    %13:gprc = ADD4 %1, killed %12
    STW killed %13, 0, %6 :: (store (s32) into %ir.Ptr)
    BCn %0, %bb.5
    B %bb.4

  bb.4.if.then:
    successors: %bb.5(0x80000000)

    INLINEASM &"#NOTHING", 1, 12, implicit-def early-clobber $r2
    ADJCALLSTACKDOWN 32, 0, implicit-def dead $r1, implicit $r1
    %14:g8rc = COPY $x2
    STD %14, 24, $x1 :: (store (s64) into stack + 24)
    %15:g8rc = EXTSW_32_64 %7
    $x3 = COPY %15
    $x12 = COPY %3
    MTCTR8 %3, implicit-def $ctr8
    BCTRL8_LDinto_toc 24, $x1, csr_ppc64_altivec, implicit-def dead $lr8, implicit-def dead $x2, implicit $ctr8, implicit $rm, implicit $x3, implicit $x12, implicit $x2, implicit-def $r1
    ADJCALLSTACKUP 32, 0, implicit-def dead $r1, implicit $r1

  bb.5.for.inc:
    successors: %bb.2(0x013521d0), %bb.3(0x7ecade30)

    %2:gprc = nuw nsw ADDI %1, 1
    %16:crrc = CMPLW %8, %2
    BCC 76, killed %16, %bb.2
    B %bb.3

...

# CHECK for enabling instruction hoisting
#CHECK-LABEL: test
#CHECK-HOIST: bb.1.for.body.lr.ph:
#CHECK-HOIST: %14:g8rc = COPY $x2
#CHECK-HOIST: STD %14, 24, $x1 :: (store (s64) into stack + 24)
#CHECK-HOIST: %15:g8rc = EXTSW_32_64 %7
#CHECK-HOIST: B %bb.3

#CHECK-HOIST: bb.4.if.then:
#CHECK-HOIST-NOT: %14:g8rc = COPY $x2
#CHECK-HOIST-NOT: STD %14, 24, $x1 :: (store (s64) into stack + 24)
#CHECK-HOIST-NOT: %15:g8rc = EXTSW_32_64 %7
#CHECK-HOIST: bb.5.for.inc:

# CHECK for disabling instruction hoisting due to block hotness
#CHECK-LABEL: test
#CHECK-NO-HOIST: bb.1.for.body.lr.ph:
#CHECK-NO-HOIST-NOT: %14:g8rc = COPY $x2
#CHECK-NO-HOIST-NOT: STD %14, 24, $x1 :: (store (s64) into stack + 24)
#CHECK-NO-HOIST-NOT: %15:g8rc = EXTSW_32_64 %7
#CHECK-NO-HOIST: B %bb.3

#CHECK-NO-HOIST: bb.4.if.then:
#CHECK-NO-HOIST: %14:g8rc = COPY $x2
#CHECK-NO-HOIST: STD %14, 24, $x1 :: (store (s64) into stack + 24)
#CHECK-NO-HOIST: %15:g8rc = EXTSW_32_64 %7
#CHECK-NO-HOIST: bb.5.for.inc:
